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| author | Vasil Zlatanov <v@skozl.com> | 2017-05-03 16:30:16 +0100 |
|---|---|---|
| committer | Vasil Zlatanov <v@skozl.com> | 2017-05-03 16:30:16 +0100 |
| commit | a6ed1742539c62186fb903017b52dd48f145ae4f (patch) | |
| tree | e9f49f0437e1f260b276b45fddcb66ea524f49e3 /ext/TARGET_LPC1768/TARGET_NXP | |
| download | e2-switch-a6ed1742539c62186fb903017b52dd48f145ae4f.tar.gz e2-switch-a6ed1742539c62186fb903017b52dd48f145ae4f.tar.bz2 e2-switch-a6ed1742539c62186fb903017b52dd48f145ae4f.zip | |
Add template and build environment.
Diffstat (limited to 'ext/TARGET_LPC1768/TARGET_NXP')
7 files changed, 486 insertions, 0 deletions
diff --git a/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/PeripheralNames.h b/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/PeripheralNames.h new file mode 100644 index 0000000..9908132 --- /dev/null +++ b/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/PeripheralNames.h @@ -0,0 +1,111 @@ +/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_PERIPHERALNAMES_H
+#define MBED_PERIPHERALNAMES_H
+
+#include "cmsis.h"
+#include "PinNames.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+ UART_0 = (int)LPC_UART0_BASE,
+ UART_1 = (int)LPC_UART1_BASE,
+ UART_2 = (int)LPC_UART2_BASE,
+ UART_3 = (int)LPC_UART3_BASE
+} UARTName;
+
+typedef enum {
+ ADC0_0 = 0,
+ ADC0_1,
+ ADC0_2,
+ ADC0_3,
+ ADC0_4,
+ ADC0_5,
+ ADC0_6,
+ ADC0_7
+} ADCName;
+
+typedef enum {
+ DAC_0 = 0
+} DACName;
+
+typedef enum {
+ SPI_0 = (int)LPC_SSP0_BASE,
+ SPI_1 = (int)LPC_SSP1_BASE
+} SPIName;
+
+typedef enum {
+ I2C_0 = (int)LPC_I2C0_BASE,
+ I2C_1 = (int)LPC_I2C1_BASE,
+ I2C_2 = (int)LPC_I2C2_BASE
+} I2CName;
+
+typedef enum {
+ PWM_1 = 1,
+ PWM_2,
+ PWM_3,
+ PWM_4,
+ PWM_5,
+ PWM_6
+} PWMName;
+
+typedef enum {
+ CAN_1 = (int)LPC_CAN1_BASE,
+ CAN_2 = (int)LPC_CAN2_BASE
+} CANName;
+
+#define STDIO_UART_TX USBTX
+#define STDIO_UART_RX USBRX
+#define STDIO_UART UART_0
+
+// Default peripherals
+#define MBED_SPI0 p5, p6, p7, p8
+#define MBED_SPI1 p11, p12, p13, p14
+
+#define MBED_UART0 p9, p10
+#define MBED_UART1 p13, p14
+#define MBED_UART2 p28, p27
+#define MBED_UARTUSB USBTX, USBRX
+
+#define MBED_I2C0 p28, p27
+#define MBED_I2C1 p9, p10
+
+#define MBED_CAN0 p30, p29
+
+#define MBED_ANALOGOUT0 p18
+
+#define MBED_ANALOGIN0 p15
+#define MBED_ANALOGIN1 p16
+#define MBED_ANALOGIN2 p17
+#define MBED_ANALOGIN3 p18
+#define MBED_ANALOGIN4 p19
+#define MBED_ANALOGIN5 p20
+
+#define MBED_PWMOUT0 p26
+#define MBED_PWMOUT1 p25
+#define MBED_PWMOUT2 p24
+#define MBED_PWMOUT3 p23
+#define MBED_PWMOUT4 p22
+#define MBED_PWMOUT5 p21
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/PortNames.h b/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/PortNames.h new file mode 100644 index 0000000..4a7bf9e --- /dev/null +++ b/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/PortNames.h @@ -0,0 +1,34 @@ +/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_PORTNAMES_H
+#define MBED_PORTNAMES_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+ Port0 = 0,
+ Port1 = 1,
+ Port2 = 2,
+ Port3 = 3,
+ Port4 = 4
+} PortName;
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/PinNames.h b/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/PinNames.h new file mode 100644 index 0000000..f6cec0f --- /dev/null +++ b/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/PinNames.h @@ -0,0 +1,139 @@ +/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_PINNAMES_H
+#define MBED_PINNAMES_H
+
+#include "cmsis.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+ PIN_INPUT,
+ PIN_OUTPUT
+} PinDirection;
+
+#define PORT_SHIFT 5
+
+typedef enum {
+ // LPC Pin Names
+ P0_0 = LPC_GPIO0_BASE,
+ P0_1, P0_2, P0_3, P0_4, P0_5, P0_6, P0_7, P0_8, P0_9, P0_10, P0_11, P0_12, P0_13, P0_14, P0_15, P0_16, P0_17, P0_18, P0_19, P0_20, P0_21, P0_22, P0_23, P0_24, P0_25, P0_26, P0_27, P0_28, P0_29, P0_30, P0_31,
+ P1_0, P1_1, P1_2, P1_3, P1_4, P1_5, P1_6, P1_7, P1_8, P1_9, P1_10, P1_11, P1_12, P1_13, P1_14, P1_15, P1_16, P1_17, P1_18, P1_19, P1_20, P1_21, P1_22, P1_23, P1_24, P1_25, P1_26, P1_27, P1_28, P1_29, P1_30, P1_31,
+ P2_0, P2_1, P2_2, P2_3, P2_4, P2_5, P2_6, P2_7, P2_8, P2_9, P2_10, P2_11, P2_12, P2_13, P2_14, P2_15, P2_16, P2_17, P2_18, P2_19, P2_20, P2_21, P2_22, P2_23, P2_24, P2_25, P2_26, P2_27, P2_28, P2_29, P2_30, P2_31,
+ P3_0, P3_1, P3_2, P3_3, P3_4, P3_5, P3_6, P3_7, P3_8, P3_9, P3_10, P3_11, P3_12, P3_13, P3_14, P3_15, P3_16, P3_17, P3_18, P3_19, P3_20, P3_21, P3_22, P3_23, P3_24, P3_25, P3_26, P3_27, P3_28, P3_29, P3_30, P3_31,
+ P4_0, P4_1, P4_2, P4_3, P4_4, P4_5, P4_6, P4_7, P4_8, P4_9, P4_10, P4_11, P4_12, P4_13, P4_14, P4_15, P4_16, P4_17, P4_18, P4_19, P4_20, P4_21, P4_22, P4_23, P4_24, P4_25, P4_26, P4_27, P4_28, P4_29, P4_30, P4_31,
+
+ // mbed DIP Pin Names
+ p5 = P0_9,
+ p6 = P0_8,
+ p7 = P0_7,
+ p8 = P0_6,
+ p9 = P0_0,
+ p10 = P0_1,
+ p11 = P0_18,
+ p12 = P0_17,
+ p13 = P0_15,
+ p14 = P0_16,
+ p15 = P0_23,
+ p16 = P0_24,
+ p17 = P0_25,
+ p18 = P0_26,
+ p19 = P1_30,
+ p20 = P1_31,
+ p21 = P2_5,
+ p22 = P2_4,
+ p23 = P2_3,
+ p24 = P2_2,
+ p25 = P2_1,
+ p26 = P2_0,
+ p27 = P0_11,
+ p28 = P0_10,
+ p29 = P0_5,
+ p30 = P0_4,
+
+ // Other mbed Pin Names
+#ifdef MCB1700
+ LED1 = P1_28,
+ LED2 = P1_29,
+ LED3 = P1_31,
+ LED4 = P2_2,
+#else
+ LED1 = P1_18,
+ LED2 = P1_20,
+ LED3 = P1_21,
+ LED4 = P1_23,
+#endif
+ USBTX = P0_2,
+ USBRX = P0_3,
+
+ // Arch Pro Pin Names
+ D0 = P4_29,
+ D1 = P4_28,
+ D2 = P0_4,
+ D3 = P0_5,
+ D4 = P2_2,
+ D5 = P2_3,
+ D6 = P2_4,
+ D7 = P2_5,
+ D8 = P0_0,
+ D9 = P0_1,
+ D10 = P0_6,
+ D11 = P0_9,
+ D12 = P0_8,
+ D13 = P0_7,
+ D14 = P0_27,
+ D15 = P0_28,
+
+ A0 = P0_23,
+ A1 = P0_24,
+ A2 = P0_25,
+ A3 = P0_26,
+ A4 = P1_30,
+ A5 = P1_31,
+
+ I2C_SCL = D15,
+ I2C_SDA = D14,
+
+ // Not connected
+ NC = (int)0xFFFFFFFF
+} PinName;
+
+typedef enum {
+ PullUp = 0,
+ PullDown = 3,
+ PullNone = 2,
+ Repeater = 1,
+ OpenDrain = 4,
+ PullDefault = PullDown
+} PinMode;
+
+// version of PINCON_TypeDef using register arrays
+typedef struct {
+ __IO uint32_t PINSEL[11];
+ uint32_t RESERVED0[5];
+ __IO uint32_t PINMODE[10];
+ __IO uint32_t PINMODE_OD[5];
+} PINCONARRAY_TypeDef;
+
+#define PINCONARRAY ((PINCONARRAY_TypeDef *)LPC_PINCON_BASE)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/device.h b/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/device.h new file mode 100644 index 0000000..a58c4fd --- /dev/null +++ b/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/device.h @@ -0,0 +1,60 @@ +/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_DEVICE_H
+#define MBED_DEVICE_H
+
+#define DEVICE_PORTIN 1
+#define DEVICE_PORTOUT 1
+#define DEVICE_PORTINOUT 1
+
+#define DEVICE_INTERRUPTIN 1
+
+#define DEVICE_ANALOGIN 1
+#define DEVICE_ANALOGOUT 1
+
+#define DEVICE_SERIAL 1
+#define DEVICE_SERIAL_FC 1
+
+#define DEVICE_I2C 1
+#define DEVICE_I2CSLAVE 1
+
+#define DEVICE_SPI 1
+#define DEVICE_SPISLAVE 1
+
+#define DEVICE_CAN 1
+
+#define DEVICE_RTC 1
+
+#define DEVICE_ETHERNET 1
+
+#define DEVICE_PWMOUT 1
+
+#define DEVICE_SEMIHOST 1
+#define DEVICE_LOCALFILESYSTEM 1
+#define DEVICE_ID_LENGTH 32
+#define DEVICE_MAC_OFFSET 20
+
+#define DEVICE_SLEEP 1
+
+#define DEVICE_DEBUG_AWARENESS 1
+
+#define DEVICE_STDIO_MESSAGES 1
+
+#define DEVICE_ERROR_PATTERN 1
+
+#include "objects.h"
+
+#endif
diff --git a/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/reserved_pins.h b/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/reserved_pins.h new file mode 100644 index 0000000..0578c9d --- /dev/null +++ b/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/reserved_pins.h @@ -0,0 +1,8 @@ +// List of reserved pins for MBED LPC1768
+
+#ifndef RESERVED_PINS_H
+#define RESERVED_PINS_H
+
+#define TARGET_RESERVED_PINS {}
+
+#endif
diff --git a/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/gpio_object.h b/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/gpio_object.h new file mode 100644 index 0000000..0c465a9 --- /dev/null +++ b/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/gpio_object.h @@ -0,0 +1,56 @@ +/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_GPIO_OBJECT_H
+#define MBED_GPIO_OBJECT_H
+
+#include "mbed_assert.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+ PinName pin;
+ uint32_t mask;
+
+ __IO uint32_t *reg_dir;
+ __IO uint32_t *reg_set;
+ __IO uint32_t *reg_clr;
+ __I uint32_t *reg_in;
+} gpio_t;
+
+static inline void gpio_write(gpio_t *obj, int value) {
+ MBED_ASSERT(obj->pin != (PinName)NC);
+ if (value)
+ *obj->reg_set = obj->mask;
+ else
+ *obj->reg_clr = obj->mask;
+}
+
+static inline int gpio_read(gpio_t *obj) {
+ MBED_ASSERT(obj->pin != (PinName)NC);
+ return ((*obj->reg_in & obj->mask) ? 1 : 0);
+}
+
+static inline int gpio_is_connected(const gpio_t *obj) {
+ return obj->pin != (PinName)NC;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/objects.h b/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/objects.h new file mode 100644 index 0000000..de6caad --- /dev/null +++ b/ext/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/objects.h @@ -0,0 +1,78 @@ +/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_OBJECTS_H
+#define MBED_OBJECTS_H
+
+#include "cmsis.h"
+#include "PortNames.h"
+#include "PeripheralNames.h"
+#include "PinNames.h"
+#include "gpio_object.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct gpio_irq_s {
+ uint32_t port;
+ uint32_t pin;
+ uint32_t ch;
+};
+
+struct port_s {
+ __IO uint32_t *reg_dir;
+ __IO uint32_t *reg_out;
+ __I uint32_t *reg_in;
+ PortName port;
+ uint32_t mask;
+};
+
+struct pwmout_s {
+ __IO uint32_t *MR;
+ PWMName pwm;
+};
+
+struct serial_s {
+ LPC_UART_TypeDef *uart;
+ int index;
+};
+
+struct analogin_s {
+ ADCName adc;
+};
+
+struct dac_s {
+ DACName dac;
+};
+
+struct can_s {
+ LPC_CAN_TypeDef *dev;
+ int index;
+};
+
+struct i2c_s {
+ LPC_I2C_TypeDef *i2c;
+};
+
+struct spi_s {
+ LPC_SSP_TypeDef *spi;
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
|