module fsm(
	input CLOCK_MS,
	input CLOCK_HS,
	
	input KEY,
	input TIME_OUT,

	output reg START_DELAY,
	output reg EN_LFSR,
	output reg [9:0] LEDR,
	output reg COUNT,
	output reg COUNT_CLEAR
);
	reg [3:0] state;

	parameter wait_key_press=0, wait_key_release=1, led_one=2, led_two=3, led_three=4, led_four=5, led_five=6, led_six=7, led_seven=8, led_eight=9, led_nine=10, led_ten=11, delay=12, led_zero=13, response=14, response_end=15; 

	always @ (state)
	begin
		case (state)
			wait_key_press:
			begin
				EN_LFSR <= 1'b0;
				START_DELAY <= 1'b0;
				LEDR [9:0] <= 10'b0;
				COUNT <= 1'b0;
				COUNT_CLEAR <= 1'b0;
			end
			wait_key_release:
			begin
				EN_LFSR <= 1'b1;
				START_DELAY <= 1'b0;
				LEDR [9:0] <= 10'b0;
				COUNT <= 1'b0;
				COUNT_CLEAR <= 1'b1;
			end
			led_zero:
			begin
				EN_LFSR <= 1'b0;
				START_DELAY <= 1'b0;
				LEDR [9:0] <= 10'b0;
				COUNT <= 1'b0;
				COUNT_CLEAR <= 1'b0;
			end
			led_one:
			begin
				EN_LFSR <= 1'b0;
				START_DELAY <= 1'b0;
				LEDR [9:0] <= 10'b1000000000;
				COUNT <= 1'b0;
				COUNT_CLEAR <= 1'b0;
			end
			led_two:
			begin
				EN_LFSR <= 1'b0;
				START_DELAY <= 1'b0;
				LEDR [9:0] <= 10'b1100000000;
				COUNT <= 1'b0;
				COUNT_CLEAR <= 1'b0;
			end
			led_three:
			begin
				EN_LFSR <= 1'b0;
				START_DELAY <= 1'b0;
				LEDR [9:0] <= 10'b1110000000;
				COUNT <= 1'b0;
				COUNT_CLEAR <= 1'b0;
			end
			led_four:
			begin
				EN_LFSR <= 1'b0;
				START_DELAY <= 1'b0;
				LEDR [9:0] <= 10'b1111000000;
				COUNT <= 1'b0;
				COUNT_CLEAR <= 1'b0;
			end
			led_five:
			begin
				EN_LFSR <= 1'b0;
				START_DELAY <= 1'b0;
				LEDR [9:0] <= 10'b1111100000;
				COUNT <= 1'b0;
				COUNT_CLEAR <= 1'b0;
			end
			led_six:
			begin
				EN_LFSR <= 1'b0;
				START_DELAY <= 1'b0;
				LEDR [9:0] <= 10'b1111110000;
				COUNT <= 1'b0;
				COUNT_CLEAR <= 1'b0;
			end
			led_seven:
			begin
				EN_LFSR <= 1'b0;
				START_DELAY <= 1'b0;
				LEDR [9:0] <= 10'b1111111000;
				COUNT <= 1'b0;
				COUNT_CLEAR <= 1'b0;
			end
			led_eight:
			begin
				EN_LFSR <= 1'b0;
				START_DELAY <= 1'b0;
				LEDR [9:0] <= 10'b1111111100;
				COUNT <= 1'b0;
				COUNT_CLEAR <= 1'b0;
			end
			led_nine:
			begin
				EN_LFSR <= 1'b0;
				START_DELAY <= 1'b0;
				LEDR [9:0] <= 10'b1111111110;
				COUNT <= 1'b0;
				COUNT_CLEAR <= 1'b0;
			end
			led_ten:
			begin
				EN_LFSR <= 1'b0;
				START_DELAY <= 1'b0;
				LEDR [9:0] <= 10'b1111111111;
				COUNT <= 1'b0;
				COUNT_CLEAR <= 1'b0;
			end
			delay:
			begin
				EN_LFSR <= 1'b0;
				START_DELAY <= 1'b1;
				LEDR [9:0] <= 10'b1111111111;
				COUNT <= 1'b0;
				COUNT_CLEAR <= 1'b0;
			end
			response:
			begin
				EN_LFSR <= 1'b0;
				START_DELAY <= 1'b1;
				LEDR [9:0] <= 10'b0;
			   COUNT <= 1'b1;
				COUNT_CLEAR <= 1'b0;
			end
			response_end:
			begin
				EN_LFSR <= 1'b0;
				START_DELAY <= 1'b0;
				LEDR [9:0] <= 10'b0;
				COUNT <= 1'b0;
				COUNT_CLEAR <= 1'b0;
			end
			default:
			begin
				EN_LFSR <= 1'b0;
				START_DELAY <= 1'b0;
				LEDR [9:0] <= 10'b0;
				COUNT <= 1'b0;
				COUNT_CLEAR <= 1'b0;
			end
		endcase
	end

	always @(posedge CLOCK_MS)
	begin
		case (state)
			wait_key_press: 
				if (~KEY)
					state = wait_key_release; 
				else 
					state = wait_key_press;
			wait_key_release: 
				if (KEY)
					state = led_zero; 
				else 
					state = wait_key_release;
			led_zero: 
				if (CLOCK_HS)
					state = led_one; 
				else 
					state = led_zero;
			led_one: 
				if (CLOCK_HS)
					state = led_two; 
				else 
					state = led_one;
			led_two: 
				if (CLOCK_HS)
					state = led_three; 
				else
					state = led_two;
			led_three: 
				if (CLOCK_HS)
					state = led_four; 
				else
					state = led_three;
			led_four: 
				if (CLOCK_HS)
					state = led_five; 
				else
					state = led_four;
			led_five: 
				if (CLOCK_HS)
					state = led_six; 
				else
					state = led_five;
			led_six: 
				if (CLOCK_HS)
					state = led_seven; 
				else
					state = led_six;
			led_seven: 
				if (CLOCK_HS)
					state = led_eight; 
				else
					state = led_seven;
			led_eight: 
				if (CLOCK_HS)
					state = led_nine; 
				else
					state = led_eight;
			led_nine: 
				if (CLOCK_HS)
					state = led_ten; 
				else
					state = led_nine;
			led_ten: 
				if (CLOCK_HS)
					state =	delay; 
				else
					state = led_ten;
			delay: 
				if (TIME_OUT)
					state = response;
				else
					state = delay;
			response: 
				if (~KEY)
					state = response_end;
				else
					state = response;
			response_end:
				if (KEY)
					state = wait_key_press;
				else 
					state = response_end;
		endcase
	end
endmodule