module ex13_top (
	CLOCK_50,
	DAC_SDI,
	DAC_CS,
	DAC_LD,
	DAC_SCK,
	PWM_OUT
);
	input CLOCK_50;
	output DAC_SDI,DAC_CS,DAC_SCK,DAC_LD,PWM_OUT;

	wire CLOCK_DIVIDED;
	wire [9:0] A,D;
	
	divider_5000 DIV0 (CLOCK_50, CLOCK_DIVIDED);
	
	counter_16 COUNT0 (
		.clock(CLOCK_50),
		.enable(CLOCK_DIVIDED),
		.reset(1'b1),
		.count(A[9:0])
	);
	
	ROM ROM0 (
		.address(A),
		.clock(CLOCK_DIVIDED),
		.q(D[9:0])
	);
	
	spi2dac SPI0 (
		.sysclk(CLOCK_50), 
		.data_in(D[9:0]), 
		.load(CLOCK_DIVIDED), 
		.dac_sdi(DAC_SDI), 
		.dac_cs(DAC_CS), 
		.dac_sck(DAC_SCK), 
		.dac_ld(DAC_LD)
	);
		
	pwm PWM0 (
		.clk(CLOCK_50), 
		.data_in(D[9:0]), 
		.load(CLOCK_DIVIDED), 
		.pwm_out(PWM_OUT)
	);
	
endmodule