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author | Vasil Zlatanov <v@skozl.com> | 2016-12-12 21:51:10 +0000 |
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committer | Vasil Zlatanov <v@skozl.com> | 2016-12-12 21:51:10 +0000 |
commit | 4b6e0102d20d9ab060ce930e4b846c8be446bb06 (patch) | |
tree | e475eab3716738f2928f0b2063956e9b155f94ab /part_4/ex16/simulation/modelsim/init_spi.do | |
download | e2-verilab-4b6e0102d20d9ab060ce930e4b846c8be446bb06.tar.gz e2-verilab-4b6e0102d20d9ab060ce930e4b846c8be446bb06.tar.bz2 e2-verilab-4b6e0102d20d9ab060ce930e4b846c8be446bb06.zip |
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Diffstat (limited to 'part_4/ex16/simulation/modelsim/init_spi.do')
-rw-r--r-- | part_4/ex16/simulation/modelsim/init_spi.do | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/part_4/ex16/simulation/modelsim/init_spi.do b/part_4/ex16/simulation/modelsim/init_spi.do new file mode 100644 index 0000000..b99ff7a --- /dev/null +++ b/part_4/ex16/simulation/modelsim/init_spi.do @@ -0,0 +1,25 @@ +add wave -position end sim:/spi2dac/sysclk +add wave -position end sim:/spi2dac/div2 +add wave -position end sim:/spi2dac/div4 +add wave -position end sim:/spi2dac/status_busy +add wave -position end -hexadecimal sim:/spi2dac/data_in +add wave -position end sim:/spi2dac/ld +add wave -position end -hexadecimal sim:/spi2dac/state +add wave -position end sim:/spi2dac/sck_ena +add wave -position end sim:/spi2dac/dac_ld +add wave -position end -hexadecimal sim:/spi2dac/shift_reg +add wave -position end sim:/spi2dac/spi_sdo +add wave -position end sim:/spi2dac/spi_cs +add wave -position end sim:/spi2dac/spi_sck +add wave -position end sim:/spi2dac/spi_ld +add wave -position end sim:/spi2dac/rs_state +force -freeze sim:/spi2dac/sysclk 1 0, 0 {10 ns} -r 20 ns +run 20ns +force data_in 10'h2c3 +force ld 0 +run 20ns +force ld 1 +run 20ns +force ld 0 +run 20ns +
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