diff options
Diffstat (limited to 'part_3/ex15/MULT_bb.v')
| -rw-r--r-- | part_3/ex15/MULT_bb.v | 90 |
1 files changed, 90 insertions, 0 deletions
diff --git a/part_3/ex15/MULT_bb.v b/part_3/ex15/MULT_bb.v new file mode 100644 index 0000000..7babb68 --- /dev/null +++ b/part_3/ex15/MULT_bb.v @@ -0,0 +1,90 @@ +// megafunction wizard: %ALTMEMMULT%VBB%
+// GENERATION: STANDARD
+// VERSION: WM1.0
+// MODULE: altmemmult
+
+// ============================================================
+// File Name: MULT.v
+// Megafunction Name(s):
+// altmemmult
+//
+// Simulation Library Files(s):
+// altera_mf;cyclonev
+// ============================================================
+// ************************************************************
+// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+//
+// 16.0.0 Build 211 04/27/2016 SJ Standard Edition
+// ************************************************************
+
+//Copyright (C) 1991-2016 Altera Corporation. All rights reserved.
+//Your use of Altera Corporation's design tools, logic functions
+//and other software and tools, and its AMPP partner logic
+//functions, and any output files from any of the foregoing
+//(including device programming or simulation files), and any
+//associated documentation or information are expressly subject
+//to the terms and conditions of the Altera Program License
+//Subscription Agreement, the Altera Quartus Prime License Agreement,
+//the Altera MegaCore Function License Agreement, or other
+//applicable license agreement, including, without limitation,
+//that your use is for the sole purpose of programming logic
+//devices manufactured by Altera and sold by Altera or its
+//authorized distributors. Please refer to the applicable
+//agreement for further details.
+
+module MULT (
+ clock,
+ data_in,
+ sload_data,
+ result,
+ result_valid)/* synthesis synthesis_clearbox = 1 */;
+
+ input clock;
+ input [15:0] data_in;
+ input sload_data;
+ output [31:0] result;
+ output result_valid;
+
+endmodule
+
+// ============================================================
+// CNX file retrieval info
+// ============================================================
+// Retrieval info: PRIVATE: COEFFICIENT0 STRING "10000"
+// Retrieval info: PRIVATE: COEFF_REPRESENTATION_COMBO STRING "UNSIGNED"
+// Retrieval info: PRIVATE: COUNT_C_COMBO STRING "16"
+// Retrieval info: PRIVATE: COUNT_D_COMBO STRING "16"
+// Retrieval info: PRIVATE: DATA_REPRESENTATION_COMBO STRING "UNSIGNED"
+// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone V"
+// Retrieval info: PRIVATE: LOADABLE_COEFF STRING "0"
+// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"
+// Retrieval info: PRIVATE: SCLR_CHECK STRING "0"
+// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+// Retrieval info: CONSTANT: COEFFICIENT0 STRING "10000"
+// Retrieval info: CONSTANT: COEFF_REPRESENTATION STRING "UNSIGNED"
+// Retrieval info: CONSTANT: DATA_REPRESENTATION STRING "UNSIGNED"
+// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone V"
+// Retrieval info: CONSTANT: MAX_CLOCK_CYCLES_PER_RESULT NUMERIC "4"
+// Retrieval info: CONSTANT: RAM_BLOCK_TYPE STRING "AUTO"
+// Retrieval info: CONSTANT: TOTAL_LATENCY NUMERIC "7"
+// Retrieval info: CONSTANT: WIDTH_C NUMERIC "16"
+// Retrieval info: CONSTANT: WIDTH_D NUMERIC "16"
+// Retrieval info: CONSTANT: WIDTH_R NUMERIC "32"
+// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL "clock"
+// Retrieval info: USED_PORT: data_in 0 0 16 0 INPUT NODEFVAL "data_in[15..0]"
+// Retrieval info: USED_PORT: result 0 0 32 0 OUTPUT NODEFVAL "result[31..0]"
+// Retrieval info: USED_PORT: result_valid 0 0 0 0 OUTPUT NODEFVAL "result_valid"
+// Retrieval info: USED_PORT: sload_data 0 0 0 0 INPUT NODEFVAL "sload_data"
+// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0
+// Retrieval info: CONNECT: @data_in 0 0 16 0 data_in 0 0 16 0
+// Retrieval info: CONNECT: @sload_data 0 0 0 0 sload_data 0 0 0 0
+// Retrieval info: CONNECT: result 0 0 32 0 @result 0 0 32 0
+// Retrieval info: CONNECT: result_valid 0 0 0 0 @result_valid 0 0 0 0
+// Retrieval info: GEN_FILE: TYPE_NORMAL MULT.v TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL MULT.inc FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL MULT.cmp FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL MULT.bsf FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL MULT_inst.v FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL MULT_bb.v TRUE
+// Retrieval info: LIB_FILE: altera_mf
+// Retrieval info: LIB_FILE: cyclonev
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